1. Field of the Invention
The present invention relates to a variation distribution simulation apparatus and method and a recording medium, for example, to model parameters to be used in a SPICE (Simulation Program with Integrated Circuit Emphasis) circuit simulation, and more particularly, to calculations of parameters to be used to analyze variations and sensitivities of MOSFET circuits.
2. Background Art
In the field of semiconductor technology, a variation analysis is normally carried out through a SPICE circuit simulation in the final stage of circuit design, so as to optimize circuits with respect to the yield rate.
However, the conventional variation simulation has the following problems.
For example, in a Principle Component Monitor model, significant intermediate variables are extracted from actual variation data, and a model is formed with polynomial expressions of the intermediate variables. To realize this, however, vast numbers of tests need to be conducted, and complicated statistical procedures need to be carried out. As a result, a large number of development procedures are required.
JP-A H9-106416 (KOKAI) discloses a technique by which the variation of a threshold voltage VTH as a SPICE parameter of MOSFETs is expressed with a thickness TOX of a gate insulator, so as to express the variations of the MOSFETs. However, this is not enough to express the actual variations of the MOSFETs. Particularly, this is insufficient for the design of analog RF (radio-frequency) circuits that are required to have high precision.
According to the reference “M. Kondo et al., “Model-Adaptable MOSFET Parameter-Extraction Method Using an Intermediate Model”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 400-405, Vol. 17, No. 5, May 1998”, a statistical model of a MOSFET is generated by using an intermediate model, and the threshold voltage VTH and the like are used as intermediate variables. The intermediate model is generated by using the data about the I-V characteristics of MOSFETs. However, a certain period of time is required to generate the intermediate model, and the circuit characteristics varying with the process variation cannot be directly observed.